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A hybrid MMC with SiC-based Full-bridge and Si-based Half-Bridge Sub-Modules with Novel Voltage Sorting Scheme
Journal
Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Date Issued
2022-01-01
Author(s)
Shahane, Rajat
Belkhode, Satish
Shukla, Anshuman
Abstract
This paper presents a silicon (Si) and silicon carbide (SiC)-based hybrid modular multilevel converter (H-MMC) comprising a combination of half-bridge and full-bridge sub-modules (HBSMs and FBSMs) with a novel voltage sorting scheme. In addition to the fault blocking capability, the proposed H-MMC achieves improved device utilization by reducing the number of switching devices compared to the conventional FBSM-based MMC. Further, the proposed H-MMC enhances the utilization of its DC-link by providing increased number of voltage levels compared to the conventional HBSM-based MMC. Moreover, the proposed sorting scheme balances the SM capacitor voltages of the proposed H-MMC for wide operating range. The proposed H-MMC is comprised of two SiC MOSFET-based FBSMs with the remaining silicon (Si) IGBT-based HBSMs. In this way, by utilizing the lower switching losses of SiC devices, converter switching losses are reduced. Further, Si-based SMs are utilized to achieve reduced conduction losses. Therefore, high efficiency is achieved. In this paper, the operation of the proposed H-MMC is validated using the PLECS block sets in the MATLAB/Simulink environment. Finally, a reduced-scale hardware prototype is developed to revalidate the analytical and simulation findings.
Subjects