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ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications
Journal
Proceedings - IEEE International Symposium on Circuits and Systems
ISSN
02714310
Date Issued
2022-01-01
Author(s)
Mishra, Vishesh
Pandey, Divy
Singh, Saurabh
Satapathy, Sagar
Goswami, Kaustav
Jajodia, Babita
Banerjee, Dip Sankar
Abstract
In recent times, approximate computing has emerged as a promising technique to achieve significant power and energy benefits in computational systems. It is widely employed in fault-tolerant computationally intensive applications that require large arithmetic blocks. Applications such as image processing and machine learning often invoke the Multiply-Accumulate (MAC) unit for convolution operations. This paper proposes a novel architecture for an (unsigned × unsigned) approximate rounding and truncation based MAC unit named ART-MAC. It replaces the accurate multiplier architecture with an approximate multiplier proposed along with this work, thus improving the overall Quality of Results (QoR). The proposed design consumes 35.35% less power and showcases a significant speedup of 1.23 times when compared to the conventional MAC unit. On an average, the ART-MAC consumes 7.44% lesser on-chip area and showcases 13.49% lesser power-delay-product (PDP) compared to existing state-of-the-art designs.
Volume
2022-May
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