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Modeling and Analysis of PBTI, and HCD in Presence of Self-Heating in GAA-SNS NFETs
Journal
IEEE Transactions on Electron Devices
ISSN
00189383
Date Issued
2022-12-01
Author(s)
Choudhury, Nilotpal
Mahapatra, Souvik
Abstract
Ultrafast measurements (10- μ s delay) are done to characterize the time evolution of threshold voltage shift Δ VT due to the positive bias temperature instability (PBTI) and hot carrier degradation (HCD) in gate all around stacked nanosheet (GAA-SNS) N-channel field-effect transistors (NFETs). Δ VT time kinetics are analyzed at different gate voltages VG and temperatures T during PBTI, and at various VG /drain voltage VD during HCD. PBTI contribution during HCD is estimated with a physics-based BTI analysis tool (BAT) framework in presence of self-heating (SH) and nonuniform vertical field EVRT covering full VG/VD span and intrinsic HCD contribution is decoupled.
Volume
69
Subjects